The Role:
As a Functional Verification Principal Engineer, you will be interfacing with architecture, de-sign, physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work will involve high-level modelling, UVM, HW/SW Co-Debug, Simulation Acceleration support.
Key Responsibilities:
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Reading and analysing the system requirements and architecture requirement documents.
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Developing detailed Test and Coverage plans based on the Architecture and Micro-architec-ture.
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Developing Verification Methodology, ensuring scalability and portability across environ-ments.
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Developing Verification environment development and maintenance in SystemVeri-log/UVM/SystemC/C++, including all the respective components such as Stimulus, Checkers, Assertions, Trackers, and Coverage.
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Executing Verification Plans, including Design Bring-up, DV environment Bring-up, Regres-sions and Debug of the test failures.
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Using the standard tools and flows of the verification process (Simulators, Coverage Analyz-ers, Unix, Continuous Integration, Bug Tracking, …).
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Create and execute testcases to verify the functionality, performance, and robustness in em-bedded C and SV.
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Identify, isolate, and debug issues found during verification, leveraging simulation and debug-ging tools to root-cause failures and drive resolution with design and architecture teams.
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Work closely with cross-functional teams to achieve verification closure, conducting coverage analysis, bug tracking, and regression testing to ensure the quality and completeness of verifi-cation activities.
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Organize work and deliverables between skills, internal and external teams.
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Mentoring and training the next generation of verification engineers.
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Coordinating functional verification teams.
Required Skills and Experience:
o SystemVerilog/UVM
o SystemC/C++
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Experience in Constrained random, Functional Coverage development, design debug.
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Experience in Formal Verification, UPF.
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Experience in HW-SW co-verification and simulation.
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Some previous experience in Firmware based verification is a good to have.
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Some knowledge of scripting languages like Bash/Perl/Python.
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Use of verification management tools.
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Strong debugging and problem-solving skills, with the ability to effectively analyze and resolve complex verification issues.
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Good level of English, both written and spoken is mandatory.
Preferred Qualifications:
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Experience in Firmware-based verification.
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Knowledge in metrics-driven verification.
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Insights of NOC and other IPs or standard peripherals like PCIe, DDR, HBM …
Soft skills:
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Team player, able to work with multiple cultures both on site and remotely.
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Autonomous and flexible is mandatory.
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Strong Leadership and Communication abilities.
What do we offer?
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Join an innovative team and experience company growth.
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We believe in investing in our employees and providing them with the opportunities they need to grow and develop their careers.
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Enjoy a hybrid work environment.
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We also offer flexible schedule.
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We offer a remuneration that values your experience.
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The position will have the base in Rome.
We are looking for outstanding people willing to join our mission to change this industry and help to build a better world.
If you feel identified with Openchip, please contact us. We can offer a competitive compensation package in a flexible work schema that will help you to keep a balance between your personal and professional life.
At Openchip & Software Technologies S.L., we believe a diverse and inclusive team is the key to groundbreaking ideas. We foster a work environment where everyone feels valued, respected, and empowered to reach their full potential – regardless of race, gender, ethnicity, sexual orientation, or gender identity.