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Job details
Company
Advantest
Location
Boeblingen, Germany
Employment type
Other
Seniority
Senior
Primary category
Other
Posted date
3 Apr 2026
Valid through
Job description
Job Description
- Requirements gathering and elicitation for IP
- Architecture development for CMOS IP designs
- Design and RTL coding of digital and full-custom modules
- Verification on module and chip level including test plan/cases generation.
- Documentation of implemented functionality
- Support for floor-planning and physical design
- Collaboration with other functions
Qualifications
- University degree, Diploma or BS EE
- Background in digital design (SOC), Application Specific Integrated Circuit (ASIC) design methodologies and silicon development cycle
- Experience in Register Transfer Level (RTL) coding (Verilog)
- Experience with standard simulation tools for digital designs
- Basic knowledge about UNIX* or Linux* environment and using programming languages
- Technical communication, team work and problem solving skills
- English language skills